Image processor and imaging device

ABSTRACT

A pixel comprises a light receiving portion for generating an electric signal corresponding to intensity of received light, an amplifying portion for amplifying an output signal of the light receiving portion, a plurality of storing portions for storing as a current signal an electric signal amplified by the amplifying portion, a load portion for converting current outputs of the plurality of storing portions into voltages, a bias portion for supplying an offset current to an input of the load portion, and a calculating portion for calculating an output of the load portion. Such pixels are arranged in a matrix shape. The storing portion and the photographing device are disposed on the same circuit. Thus, the process is speeded up. In addition, with a bias, the output becomes stable.

TECHNICAL FIELD

[0001] The present invention relates to a picture processing apparatusfor processing a photographed picture photographed by a photographingdevice, in particular, to a picture processing apparatus for obtainingthe difference between picture frames so as to obtain a temporal changeof brightness of an object. More specifically, the present inventionrelates to a picture processing apparatus of which a photographingdevice and a storing portion for storing photographed data photographedby the photographing device are disposed on the same circuit so as tospeed up a calculating process, in particular, to a picture processingapparatus for suppressing characteristics of the storing portion fromfluctuating even if a temporal change of brightness of an object issmall so as to obtain an accurate calculation output.

BACKGROUND ART

[0002] With a picture of an object photographed as a first frame and apicture of the object photographed as a second frame, the temporalchange of brightness of the object can be obtained.

[0003] Conventionally, when the difference between pictures is obtained,a camera that is equipped with a photographing device such as a CCD(Charge Coupled Device), a plurality of frame memories, and ancalculating apparatus are prepared and connected. In other words,picture data of a first frame that is output from the camera istemporarily stored in a frame memory. Thereafter, picture data of asecond frame that is photographed is stored in another frame memory. Thecalculating apparatus synchronously reads the contents (namely, picturedata) stored in the frame memories and calculates the difference of thecorresponding pictures.

[0004] However, conventionally, since picture data is transferred fromthe camera to the frame memories in the serial method, the transfer timefor one screen is not as short as ignored. For example, in an NTSC(National Television System Committee) type camera of which the CCD isused as a photographing device, while a picture of one frame is beingphotographed, a picture of the preceding frame is read. Thus, until apicture of one frame is read and transferred, it takes as long as 33msec. Consequently, after a picture is photographed, until thecalculated result is obtained, it takes at least 33 msec.

[0005]FIG. 10 shows a timing chart of which a photographed picture isstored and read in the CCD as a photographing device. As shown in FIG.10, it takes 33 msec until a picture of each of odd fields and evenfields is stored. In addition, as shown in FIG. 10, unless the readperiod for a picture of the second frame elapses, the calculated resultcannot be obtained.

[0006] Thus, it is difficult to apply the conventional photographingsystem using a camera composed of a CCD photographing device to acontrolling system using visual information such as visual feedback.

[0007] On other hand, in a prototype CMOS image sensor, the frame rateis raised to as high as around 1 kHz and while pictures are beingphotographed at very high speed, a calculating process is successivelyperformed so as to accomplish the visual feedback. However, in such asensor, since internal processes are digitally performed, it isnecessary to provide for example an AD converting circuit for convertinganalog values into digital values, a storing circuit for storing digitalvalues, and a calculating circuit for calculating digital values. Sincethese circuit modules have large circuit scales, they are not suitablefor a many-pixel device. Thus, it is difficult to commercially use sucha sensor (refer to “Designing ultra parallel, ultra high speed visionchip using general purpose processing element (translated title)” byKomuro et. al., Journal of The Institute of Electronics, Information andCommunication Engineers, Japan, Vol. J81-D-1, No. 2, pp. 70-76, 1998).

[0008] In addition, a CMOS image sensor for calculating analog signalsas they are has been proposed. In such sensors, a memory function isaccomplished by storing a signal voltage to a capacitor. Thus, dependingon how a capacitor is structured, each pixel becomes large. Even if thenumber of pixels can be increased by disposing a memory portion at anon-pixel area, it cannot be stated that such a method is suitable forreducing the size of the chip.

[0009] In addition, when a signal voltage is stored to a capacitor, if asignal voltage of another capacitor is read as a gate voltage of anothertransistor, since threshold voltages of individual transistorsfluctuate, there is a risk of which the one signal is read as differentvalues. As a result, the calculated result may contain an error. Inaddition, when a signal voltage is stored to a capacitor, since thecharging time cannot be ignored, such sensors are not suitable for highspeed processes.

DISCLOSURE OF THE INVENTION

[0010] Therefore, an object of the present invention is to provide anexcellent picture processing apparatus for obtaining the differencebetween picture frames so as to obtain a temporal change of brightnessof an object.

[0011] Another object of the present invention is to provide anexcellent picture processing apparatus of which a photographing deviceand a storing portion for storing photographed data photographed therebyare disposed on the same circuit so as to perform a calculating processat high speed.

[0012] A further object of the present invention is to provide anexcellent picture processing apparatus that allows characteristics of astoring portion to be suppressed from fluctuating and an accuratelycalculated output to be obtained in a situation of which a temporalchange of brightness of an object is small.

[0013] The present invention is made from the above-described point ofview. A first aspect of the present invention is a picture processingapparatus, comprising:

[0014] a light receiving portion for generating an electric signalcorresponding to intensity of received light,

[0015] an amplifying portion for amplifying an output signal of thelight receiving portion,

[0016] a plurality of storing portions for storing as a current signalan electric signal amplified by the amplifying portion,

[0017] a load portion for converting current outputs of the plurality ofstoring portions into voltages,

[0018] a bias portion for supplying an offset current to an input of theload portion,

[0019] a calculating portion for calculating an output signal of theload portion, and

[0020] an outputting portion for outputting a calculated result of thecalculating portion to the outside.

[0021] In the picture processing apparatus of the first aspect of thepresent invention, the plurality of storing portions may store currentsignals corresponding to the received light in different periods. Inthis case, the calculating portion may perform a calculating processsuch as an addition, a subtraction, or a comparison for the voltagesignals based on the current signals extracted from at least two of theplurality of storing portions.

[0022] The amplifying portion may contain mirror transistors that areconnected so that their gate electrodes face each other and amplify thecurrent signals based on the theory of current mirror.

[0023] The storing portion may store the current signals based on thetheory of current copier.

[0024] When the calculating portion compares the signal currentssupplied from two of the plurality of storing portions, the bias portionmay add an offset current to a signal current supplied from one of thetwo storing portions and may not add the offset current to the signalcurrent supplied from the other storing portion. As a result, theinfluence of an output to the calculating portion due to characteristicfluctuations of the individual storing portions can be suppressed.

[0025] A second aspect of the present invention is a photographingdevice having a plurality of pixels, arranged on the same circuit in amatrix shape, for detecting brightness of an object, each of the pixelscomprising:

[0026] a light receiving portion for generating an electric signalcorresponding to intensity of received light,

[0027] an amplifying portion for amplifying an output signal of thelight receiving portion,

[0028] a plurality of storing portions for storing as a current signalan electric signal amplified by the amplifying portion,

[0029] a load portion for converting current outputs of the plurality ofstoring portions into voltages,

[0030] a bias portion for supplying an offset current to an input of theload portion,

[0031] a calculating portion for calculating an output signal of theload portion, and

[0032] an outputting portion for outputting a calculated result of thecalculating portion.

[0033] In the photographing device of the second aspect of the presentinvention, the plurality of storing portions may store current signalscorresponding to the received light in different periods. Thecalculating portion may perform a calculating process such as anaddition, a subtraction, or a comparison for the voltage signals basedon the current signals extracted from at least two of the plurality ofstoring portions.

[0034] The amplifying portion may contain mirror transistors that areconnected so that their gate electrodes face each other and amplify thecurrent signals based on the theory of current mirror.

[0035] The storing portion may store the current signals based on thetheory of current copier.

[0036] When the calculating portion compares the signal currentssupplied from two of the plurality of storing portions, the bias portionmay add an offset current to a signal current supplied from one of thetwo storing portions and does not add the offset current to the signalcurrent supplied from the other storing portion. As a result, theinfluence of an output to the calculating portion due to characteristicfluctuations of the individual storing portions can be suppressed.

[0037] A third aspect of the present invention is a photographing devicefor detecting brightness of an object, comprising:

[0038] a pixel area in which pixels are arranged in a matrix shape, eachpixel being composed of a light receiving portion for generating anelectric signal corresponding to intensity of received light and anamplifying portion for amplifying an output signal of the lightreceiving portion,

[0039] a second amplifying portion area in which second amplifyingportions are arranged in each column of the pixels in the pixel area,each of the second amplifying portions amplifying a current signal basedon the theory of current mirror of mirror transistors that are connectedso that their gate electrodes face each other,

[0040] a pixel-outside storing area in which a plurality of storingportions are arranged in a matrix shape corresponding to the arrangementof the pixels in the pixel area, each of the storing portions storing asa current signal an electric signal that has been amplified,

[0041] a load portion and calculating portion area in which loadportions and calculating portions are arranged in each column of thepixels of the pixel area, each of the load portions converting thecurrent output of the corresponding storing portion into a voltage, eachof the calculating portions performing a calculating process, and

[0042] an outputting portion area in which outputting portions arearranged in each column of the pixels of the pixel area, each of theoutputting portions outputting the calculated result of thecorresponding calculating portion,

[0043] wherein the pixel area, the second amplifying portion area, thepixel-outside storing area, the load portion and calculating portionarea, and the outputting portion area are disposed on the same circuit.

[0044] In the photographing device of the third aspect of the presentinvention, the storing portions may store current signals correspondingto the received light in different periods. The calculating portions mayperform a calculating process such as an addition, a subtraction, or acomparison for the voltage signals corresponding to the current signalsextracted from two or more of the storing portions.

[0045] The photographing device may further comprises a bias portion foradding an offset current to an output current of the correspondingstoring portion. In such a structure, when the calculating portioncompares the signal currents supplied from two of the plurality ofstoring portions, the bias portion may add an offset current to a signalcurrent supplied from one of the two storing portions and does not addthe offset current to the signal current supplied from the other storingportion. As a result, the influence of an output to the calculatingportion due to characteristic fluctuations of the individual storingportions can be suppressed.

[0046] The storing portion may store the current signals based on thetheory of current copier.

[0047] The present invention is a picture processing apparatuscomprising a light receiving portion for generating an electric signalcorresponding to intensity of received light, an amplifying portion foramplifying an output signal of the light receiving portion, a pluralityof storing portions for storing as a current signal an electric signalamplified by the amplifying portion, a load portion for convertingcurrent outputs of the plurality of storing portions into voltages, abias portion for supplying an offset current to an input of the loadportion, and a calculating portion for calculating an output of the loadportion.

[0048] According to the structure of the picture processing apparatus ofthe present invention, since a storing portion and a photographingdevice are disposed on the same circuit, the process can be performed athigh speed. In addition, since a bias portion adds an offset current toa current signal that is output from the storing portion and that hasnot been calculated, the influence of characteristics of the storingportion can be suppressed, thereby allowing an output of the calculatingportion to become stable.

[0049] For example, when the picture processing apparatus according tothe present invention is used as a pixel and each pixel is arranged in amatrix shape on the same circuit, a photographing device with acalculating function can be structured. With the photographing device, atemporal change of brightness of an object can be calculated at highspeed.

[0050] These and other objects, features and advantages of the presentinvention will become more apparent in light of the following detaileddescription of a best mode embodiment thereof, as illustrated in theaccompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS

[0051]FIG. 1 is a schematic diagram showing the structure of a circuitof a photographing device according to an embodiment of the presentinvention;

[0052]FIG. 2 is a schematic diagram showing the internal structure of apixel disposed in the photographing device according to the embodiment;

[0053]FIG. 3 is a schematic diagram showing the structure of a circuitof a light receiving portion 10, a first amplifying portion 20, a secondamplifying portion 30, and a first storing portion 40-1 to a k-thstoring portion 40-k;

[0054]FIG. 4 is a schematic diagram showing the structure of a circuitof a loading portion and calculating portion 50 and an outputtingportion 60;

[0055]FIG. 5 is a timing chart showing operational characteristics ofthe photographing device shown in FIG. 1;

[0056]FIG. 6 is a timing chart showing operational characteristics ofwhich signal currents IM1, . . . stored in a plurality of storingportions 40-1, . . . are compared;

[0057]FIG. 7 is a schematic diagram showing an example of the structureof a circuit of a bias portion 55;

[0058]FIG. 8 is a schematic diagram showing a modification example ofthe structure of the photographing device shown in FIG. 1 and thestructure of the pixel shown in FIG. 2;

[0059]FIG. 9 is a schematic diagram showing another modification exampleof the structure of the photographing device shown in FIG. 1 and thestructure of the pixel shown in FIG. 2;

[0060]FIG. 10 is a timing chart of which a photographed picture isstored and read in the case that a CCD is used as the photographingdevice;

[0061]FIG. 11 is a timing chart showing operational characteristics ofthe photographing device shown in FIG. 9;

[0062]FIG. 12 is a schematic diagram showing the structure of an activetype distance measuring system to which the photographing deviceaccording to the embodiment is applied;

[0063]FIG. 13 is a top view showing the distance measuring system shownin FIG. 12; and

[0064]FIG. 14 is a schematic diagram showing a temporal change of lightintensity that the photographing device receives and a calculated resultof the change of the intensity by the photographing device.

BEST MODES FOR CARRYING OUT THE INVENTION

[0065] Next, with reference to the accompanying drawings, an embodimentof the present invention will be described.

[0066]FIG. 1 schematically shows the structure of a circuit of aphotographing device according to the embodiment of the presentinvention. As shown in FIG. 1, the photographing device is composed ofm×n pixels 1 arranged in a matrix shape. On the respective lines of thematrix, horizontal pixel drive signal groups 81-1, 81-2, . . . , 81-nare disposed. On the respective columns of the matrix, vertical signallines 91-1, 91-2, . . . , 91-m are disposed.

[0067] The horizontal pixel drive signal groups 81 contain signals thatsynchronously drive each portion (that will be described later) of thepixels. The signals are output from a vertical driving circuit 80. Thevertical signal lines are signal lines for outputting photographedpicture signals of the pixels. The vertical signal lines 91 are disposedtoward a horizontal outputting portion 100.

[0068]FIG. 2 shows the internal structure of one of the pixels 1arranged in the photographing device. As shown in FIG. 1, the pixel 1 iscomposed of a light receiving portion 10, a first amplifying portion 20,a second amplifying portion 30, k storing portions of a first storingportion 10-1 to a k-th storing portion 40-k, a load and calculatingportion 50, a bias portion 55, and an outputting portion 60.

[0069] The light receiving portion 10 is a photoelectric convertingportion. Conventionally, the light receiving portion 10 is composed of aphoto diode (PD). The operation of the light receiving portion 10 iscontrolled by a light receiving portion drive signal 11.

[0070] The first amplifying portion 20 converts a current signaltransferred from the light receiving portion 10 into a level suitablefor a process of the second amplifying portion 30 on the next stage ofthe first amplifying portion 20. In addition, the first amplifyingportion 20 outputs the current signal at a timing defined by a firstamplifying portion drive signal 21.

[0071] The second amplifying portion 30 converts a current signaltransferred from the first amplifying portion 20 into a level suitablefor a processing process of each storing portion 40 on the next stage.In addition, the second amplifying portion 30 outputs the current signalat a timing defined by a second amplifying portion drive signal 31.

[0072] The k storing portions of the first storing portion 40-1 to thek-th storing portion 40-k are connected to an output of the secondamplifying portion 30. The k storing portions store and hold the currentof the amplified signal at a proper timing defined by a storing portiondrive signal 41. The number k of storing portions disposed in one pixeldepends on a calculating process performed on the next stage.

[0073] The load portion and calculating portion 50 is connected to alloutputs of the first storing portion 40-1 to the k-th storing portion40-k. The load portion and calculating portion 50 converts outputcurrents of all or part of the storing portions 40 into correspondingvoltages. In addition, the load portion and calculating portion 50performs a calculating process at a proper timing defined by acalculating portion drive signal 51. Although the calculating processdepends on the function of the photographing device, the calculatingprocess includes an addition, a subtraction, a comparison, and so forthof signals.

[0074] The bias portion 55 generates a bias current for eliminatingnoise corresponding to a bias portion drive signal 56 so that thecalculating portion 50 can properly perform the calculating process.

[0075] The outputting portion 60 converts the calculated result of theload portion and calculating portion 50 into a level suitable for anoutput to signal lines of the photographing device. The outputtingportion 60 outputs the converted signal as a pixel output 70 at a propertiming corresponding to an outputting portion drive signal 61.

[0076] The drive signals 11 to 61 for each portion are supplied as thehorizontal pixel drive signal groups 81 to each pixel 1 of thephotographing device. A vertical driving circuit 80 generates the drivesignals 11 to 61 and drives m pixels arranged in the horizontaldirection with the drive signals 11 to 61.

[0077] A pixel output 70 of each pixel is connected with the verticalsignal lines 91, each of which connects pixels arranged in the column(vertical) direction. The vertical signal lines 91-1, 91-2, . . . areconnected to the horizontal outputting portion 100 and extracted as aphotographed picture signal 101 to the outside of the photographingdevice.

[0078] When the number m of pixels that are horizontally arranged in thephotographing device is small, the pixel output 70 may be converted intoa proper level and then extracted as m parallel outputs to the outsideof the photographing device.

[0079] Next, the structure of a practical circuit of the pixel 1according to the embodiment will be described.

[0080]FIG. 3 shows the structure of the circuit of the light receivingportion 10, the first amplifying portion 20, the second amplifyingportion 30, and the first storing portion 40-1 to the k-th storingportion 40-k.

[0081] The light receiving portion 10 is composed of a photodiode (PD),a reset transistor (QR), and a transfer transistor (QX). A reset pulse(RST) is input to a gate terminal of the reset transistor (QR). Atransfer pulse (TX) is input as light receiving portion drive signals 11a and 11 b to a gate terminal of the transfer transistor (QX).

[0082] The first amplifying portion 20 is composed of an amplifyingtransistor (QA) and a read transistor (GR1). A read pulse (RD) is inputas a first amplifying portion drive signal 21 to a gate terminal of theread transistor (GR1).

[0083] The second amplifying portion 30 is composed of a current mirrorcircuit and a read transistor (GR2). The current mirror circuit iscomposed of a mirror transistor (CM1) and a mirror transistor (CM2)whose gate electrodes face each other. A write pulse (WR) that defines asignal transfer timing for the storing portions 40 on the next stage ofthe second amplifying portion 30 is input as a second amplifying portiondrive signal 31 to the read transistor (GR2).

[0084] Each of the first storing portion 40-1 to the k-th storingportion 40-k is composed of a memory transistor (M1 to Mk), a memorygate transistor (G1 to Gk), and a memory switch (SW1 to SWk). A storagepulse (CK11 to CKk1) and a storage pulse (CK12 to CKk2) are input asstoring portion drive signals 41 a and 41 b to the memory switch (SW1 toSWk) and the memory gate transistor (M1 to Mk), respectively.

[0085] An output signal of the second amplifying portion 30 and inputand output signals of the first storing portion 40-1 to the k-th storingportion 40-k are connected with a common signal line. In the followingdescription, a current that passes through the signal line is denoted bya common signal IM.

[0086]FIG. 4 shows the structure of a circuit of the load portion andcalculating portion 50 and the outputting portion 60.

[0087] The load portion and calculating portion 50 is composed of a loadtransistor (QL), an inverter (INV1), an inverter (INV2), a capacitor(CAP1), a capacitor (CAP2), an inverter switch (SWA), and an inverterswitch (SWB).

[0088] An inverter pulse CKA and an inverter pulse CKB are input ascalculating portion drive signals 51 a and 51 b to a gate terminal ofthe inverter switch (SWA) and a gate terminal of the inverter switch(SWB), respectively.

[0089] A load bias voltage (VL) is input to a gate terminal of the loadtransistor (QL). The load bias voltage (VL) defines the operation pointof the load transistor (QL).

[0090] The capacitor (CAP1), the inverter (INV1), and the inverterswitch (SWA) compose one chopper type comparator. Likewise, thecapacitor (CAP2), the inverter (INV2), and the inverter switch (SWB)compose one chopper type comparator.

[0091] The outputting portion 60 is composed of a buffer amplifier (BA)and a pixel output gate (PTX). An output pulse (CK0) is input as anoutputting portion drive signal 61 to a gate terminal of the pixeloutput gate (PTX). An output of the pixel output gate (PTX) becomes apixel output (V0) of the pixel 1.

[0092] Next, operational characteristics of one pixel 1 will bedescribed. The operation of the pixel 1 can be categorized as a resetperiod, a transfer period, a storage period, a calculation phase 1, anda calculation phase 2.

[0093] [Reset Period]

[0094] First of all, when the reset pulse (RST) is applied, the resettransistor (QR) is activated. As a result, the voltage on the drain sideof the reset transistor (QR) (namely, a received light signal voltage(VA)) is set to a predetermined voltage corresponding to the powersupply voltage (the predetermined voltage is temporarily denoted by VR).

[0095] [Transfer Period]

[0096] Thereafter, when a transfer pulse (TX) is applied, the transfertransistor (QX) is activated. As a result, in the storage period, signalelectric charges (electrons) that have been photo-electrically convertedby the photodiode (PD) of the light receiving portion 10 are transferredto the drain side of the reset transistor (QR). As a result, thereceived light signal voltage (VA) becomes the voltage corresponding tothe number of signal electric charges.

[0097] [Storage Period]

[0098] The received light signal voltage (VA) is the gate voltage of theamplifying transistor (QA) of the first amplifying portion 20. Thus,when a read pulse (RD) is applied, the read transistor (GR1) isactivated. As a result, a signal current corresponding to the receivedlight signal voltage (VA) flows to the mirror transistor (CM1) of thesecond amplifying portion 30.

[0099] As a result, due to the theory of current mirror, a current withan amount that depends on the size ratio of the mirror transistor (CM1)flows to the other mirror transistor (CM2).

[0100] At that point, when a write pulse (WR) is applied, the readtransistor (GR2) of the second amplifying portion 30 is activated. Inaddition, when a storage pulse (CK12) is applied, the memory gatetransistor (G1) of the first storing portion 40-1 is activated.Moreover, when a storage pulse (CK11) is applied, the memory switch(SW1) of the first storing portion 40-1 is activated. As a result, acurrent that passes through the mirror transistor (CM2) flows to thememory transistor (M1).

[0101] In addition, when the memory switch (SW1) is deactivated and thenthe memory gate transistor (G1) and the transistor (GR2) aredeactivated, the current that flows to the memory transistor (M1) can bestored.

[0102] Such a storing operation is accomplished in such a manner thatthe gate voltage that defines the value of the current that flowsbetween the source and the drain of the memory transistor (M1) ischarged to a relatively smaller gate capacity (theory of currentcopier). Thus, it is not necessary to charge a large capacity such as acapacitor. As a result, since the storing operation is completed in ashort period, the operation time of the pixel 1 can be shortened.

[0103] In the above example, the case that a current that corresponds tothe received light signal voltage (VA) is stored to the memorytransistor (M1) of the first storing portion 40-1 was described. Thisoperation can apply to the case that a current that corresponds to thereceived light signal voltage (VA) is stored to the other storingportions 40-2, . . . , 40-k.

[0104] Thus, when a signal that has been photo-electrically converted inanother period is stored to the memory transistor of another storingportion 40, a calculation that will be described later (for example, acomparison between signals) can be accomplished in the pixel 1.

[0105] Now, it is assumed that respective currents that correspond tosignals that have been photo-electrically converted in different periodshave been stored in the memory transistor (M1) of the first storingportion 40-1 and the memory transistor (M2) of the second storingportion 40-2. In this case, the currents that have been stored in thetransistors M1 and M2 are denoted by IM1 and IM2, respectively.

[0106] [Calculation Phase]

[0107] When the memory gate transistor (G1) of the first storing portion40-1 is activated, the current IM1 stored in the memory transistor (M1)flows to the load transistor (QL). As a result, a voltage (temporarilydenoted by V1) that depends on the amount of the current IM1 and theload bias voltage (VL) takes place on the electrode A side of thecapacitor (CAP1).

[0108] However, when the load bias voltage (VL) is applied in only theperiod of the calculation phase 1 and the loading bias voltage (VL) is 0V in other periods, a current can be prevented from flowing to the loadtransistor (QL).

[0109] At that point, when the inverter switch (SWA) is activated sothat the input and the output of the inverter (INV1) is short-circuited,a voltage (Vinv1) at the operation point of the inverter (INV1) takesplace on the electrode B side of the capacitor (CAP1). As a result, apotential of the difference between V1 and Vinv1 takes place between theA side and the B side of the capacitor (CAP1).

[0110] In addition, after the inverter switch (SWB) that short-circuitsthe input and the output of the inverter (INV2) is activated along withthe inverter switch (SWA), the inverter switch (SWB) is deactivated justafter the inverter switch (SWA) is deactivated. At that point, theoutput voltage (Vo1) of the inverter (INV1) and the voltage (Vinv2) atthe operation point of the inverter (INV2) are applied on the C side andthe D side of the capacitor (CAP2). Thus, a potential of the differencetakes place between both the sides.

[0111] At that point, it should be noted that when the inverter switch(SWA) is deactivated from the activated state, each voltage on the inputside and the output side of the inverter (INV1) may slightly fluctuatefrom voltages that take place when they are short-circuited due to theeffect of charge injection. In the structure shown in FIG. 4, such avoltage fluctuation component can be absorbed by the capacitor (CAP2).

[0112] [Calculation Phase 2]

[0113] Thereafter, when the memory gate transistor (G2) of the secondstoring portion 40-2 is activated, the current IM2 that is stored in thememory transistor (M2) flows to the load transistor (QL). As a result, avoltage (temporarily denoted by V2) that depends on the amount of thecurrent IM2 and the load bias voltage (VL) takes place on the electrodeA side of the capacitor (CAP2).

[0114] At that point, when the voltage V2 is higher than the voltage V1,assuming that the input capacitance of the inverter (INV1) is as smallas it can be ignored, the voltage on the B side of the capacitor (CAP1)rises by V2−V1 from the voltage (Vinv1) at the operation point. Thus,the signal level of the output of the inverter (INV1) becomes low.

[0115] As a result, the voltage on the electrode D side of the capacitor(CAP2) becomes lower than the voltage (Vinv2) at the operation point.Thus, the signal level of the output of the inverter (INV2) becomeshigh.

[0116] In contrast, when the voltage V2 is lower than the voltage V1,the voltage of the electrode B side of the capacitor (CAP1) lowers byV1−V2 from the voltage (Vinv1) at the operation point. Thus, the signallevel of the output of the inverter (INV1) becomes high.

[0117] As a result, the voltage on the electrode D of the capacitor(CAP2) becomes higher than the voltage (Vinv2) at the operation point.Thus, the signal level of the output of the inverter (INV2) becomes low.

[0118] In other words, when the current IM2 stored in the memorytransistor (M2) of the second storing portion 40-2 is larger than thecurrent IM1 stored in the memory transistor (M1) of the first storingportion 40-1, the signal level of the output of the calculating portion50 becomes high. In contrast, when the current IM1 is larger than thecurrent IM2, it is clear that the signal level of the output of thecalculating portion 50 becomes low.

[0119] In such a manner, the calculating portion 50 can compare theamounts of currents stored in the storing potions 40 (namely, comparethe intensities of received light).

[0120] An output of the calculating portion 50 is amplified to a properlevel by the buffer amplifier (BA) of the outputting portion 60. When anoutput pulse (CK0) is applied, the pixel output gate (PTX) is activated.As a result, the amplified output is output as a pixel output VO.

[0121] In the above-described operation, a calculated result for onepixel is obtained as a pixel output. Thus, when such phases from[storage period] to [calculation phase 2] are repeated corresponding tothe number of pixels, pixel outputs can be obtained from the pixels 1that are arranged in the vertical direction.

[0122]FIG. 5 shows operational characteristics of the photographingdevice in the format of a timing chart. However, in FIG. 5, only clocksfor two pixels are illustrated.

[0123] In FIG. 5, [reset period] and [transfer period] are in commonwith all pixels. Alternatively, even if [reset period] and [transferperiod] differ in each pixel, the above-described operations can beaccomplished. However, in the latter case, the timing of thephoto-electrically conversion slightly deviates in each pixel.

[0124] In the above-described example, two signal currents that arestored are compared. However, in the structure of the pixel 1 accordingto the embodiment, three or more signal currents can be compared.

[0125] It is assumed that four storing portions of first to fourthstoring portions 40-1 to 40-4 are disposed and that signals currentsIM1, IM2, IM3, and IM4 that have been received and photo-electricallyconverted are stored to memory transistors M1 to M4, respectively.

[0126] In the calculation phase 1 of the load portion and calculatingportion 50, the memory gate transistors G1 and G2 are activated at thesame time. Thus, the signal currents IM1 and IM2 flow to the loadtransistor (QL). As a result, the load current V1 takes place.

[0127] In the calculation phase 2, the memory gate transistors G3 and G4are activated at the same time. Thus, the signal currents IM3 and IM4flow to the load transistor (QL). As a result, the load current V2 takesplace.

[0128] According to the above-described operation theory, when V2 islarger than V1, the signal level of the output of the calculatingportion 50 becomes high. In contrast, when V2 is smaller than V1, thesignal level of the output of the calculating portion 50 becomes low. Insuch a manner, the signal currents IM1, . . . , stored in the pluralityof storing portions 40-1 can be compared.

[0129]FIG. 6 shows operational characteristics in the case that thesignal currents IM1, . . . stored in the plurality of storing portions40-1, . . . are compared in the form of a timing chart. However, in FIG.6, drive clocks for one pixel are illustrated.

[0130]FIG. 7 shows the structure of a circuit of the bias portion 55.The bias portion 55 adds an offset current to the input signal IM of theload portion and calculating portion 50 so as to eliminate influence ofnoise or the like.

[0131] As shown in FIG. 7, the bias portion 55 is composed of a biasload transistor (BQL), a bias transistor (BQ1), and a bias transistor(BQ2). The bias transistor (BQ1) and the bias transistor (BQ2) form acurrent mirror circuit. An offset bias voltage (VB) is applied to thegate terminal of the bias load transistor (BQL). The operation point ofthe bias load transistor (BQL) is varied by the offset bias voltage(VB). An output of the bias transistor (BQ2) is extracted as a biascurrent (IB).

[0132] In the structure shown in FIG. 7, the offset bias voltage (VB)can be controlled from the outside. In the calculation phase 1, the biascurrent (IB) is added to the signal current that is extracted from thestoring portion 40 and supplied to the load transistor (QL) of thecalculating portion 50. In contrast, in the calculation phase 2, thebias current (IB) is not added to the extracted signal current. As aresult, the output of the calculating portion 50 becomes stable.

[0133] When the signal levels of two signals that are compared arealmost the same and slightly change time by time, the output of thecalculating portion 50 repeatedly and unstably changes between the highlevel and the low level. To solve such a situation, as was describedabove, a bias current is superimposed to a current extracted in thecalculation phase 1 so that the current extracted in the calculationphase 1 is larger than a current extracted in the calculation phase 2.As a result, the output of the calculating portion can be kept to eitherthe low level or the high level (in this example, kept in the low level)so that the output of the calculating portion 50 becomes stable.

[0134] When the current extracted in the calculation phase 2 is largerthan the sum of the bias current component and the current extracted inthe calculation phase 1, the output of the calculating portion 50changes from the low level to the high level.

[0135] It is determined whether or not a current flows to the bias loadtransistor (BQL) depending on whether the offset bias voltage (VB) isapplied. As a result, the value of the bias current (IB) depends on theeffect of current mirror. However, to accurately control the value ofthe current, it is necessary to accurately control the offset biasvoltage (VB). Thus, there is a situation of which the offset biasvoltage (VB) cannot be accurately controlled. In particular, thethreshold voltage of the bias load transistor (BQL) fluctuates. The biascurrent (IB) varies for each pixel. Thus, the result may vary.

[0136] To solve such a problem, the amount of the bias current (IB) isrelatively varied by the difference of values of the offset bias voltage(VB) rather than the absolute value of the offset bias voltage (VB) sothat an output of the calculating portion 50 can practically becomestable.

[0137] First of all, in the calculation phase 1, the offset bias voltageVB1 is applied to the bias load transistor (BQL). The bias current thatflows at the time is denoted by IB2. Next, in the calculation phase 2,when the offset bias voltage is denoted by VB2, the bias current isdenoted by IB2. At that point, when the threshold voltages of the biasload transistors (BQL) are different from each other, the absolutevalues of IB1 and IB2 may largely vary. However, the difference IB1−IB2can be remarkably suppressed. As a result, the current differencesupplied as a bias becomes stable in the calculation phase 1 and thecalculation phase 2.

[0138] In addition, considering the effect of current mirror, when thesizes of the transistors are designed so that the current that flows inthe bias transistor (BQ2) is smaller than the current that flows in thebias transistor (BQ1) (namely, the bias load transistor (BQL)), theinfluence of the fluctuation of the threshold voltage can be reduced.

[0139] Next, with reference to FIG. 3, in the pixel 1 according to thepresent invention, the characteristics (namely, threshold voltages) ofthe memory transistors M1 to Mk as structural elements of the storingportions 40 can be suppressed from fluctuating.

[0140] First of all, it is assumed that the gate voltage VA of theamplifying transistor (QA) of the first amplifying portion 20 isconstant.

[0141] At that point, when a read pulse (RD) is applied, the readtransistor (GR1) is activated. As a result, a predetermined amount ofcurrent flows to the mirror transistor (CM1) that composes the currentmirror.

[0142] On the other hand, a predetermined amount of current that dependson the size ratio of the transistor CM1 flows in the other mirrortransistor (CM2) that composes the current mirror as long as the mirrortransistor (CM2) operates in the saturation region. In this example, thepredetermined amount of current is temporarily denoted by IMA.

[0143] When the read transistor (GR2), the memory gate transistor (G1),and the memory switch (SW1) are activated at the same time, IMA flows tothe memory transistor (M1).

[0144] At that point, the threshold voltage and the gate voltage (=drainvoltage) of the memory transistor (M1) are denoted by Vth-1 and VG-1,respectively. The common signal voltage between the memory gatetransistor (G1) and the read transistor (GR2) is denoted by VM-1.

[0145] Likewise, when the above-described operation is performed for thememory transistor (M2) rather than the memory transistor (M1), thecurrent IMA flows to the memory transistor (M2). At that point, thethreshold voltage and the gate voltage (=drain voltage) of the memorytransistor (M2) are denoted by Vth−2 and VG−2, respectively. The commonsignal voltage between the memory gate transistor (G2) and the readtransistor (GR2) is denoted by VM−2.

[0146] When the size of the memory transistor (M1) is completely thesame as that of the memory transistor (M2) and the threshold value ofthe former is the same as that of the latter (namely, Vth−1=Vth−2), aslong as the same current flows thereto, the relations of VG-1=VG-2 andVM-1=VM-2 are satisfied.

[0147] However, although the sizes of the transistors are the same, iftheir threshold voltages are different (namely, Vth−2=Vth−1+ΔVth) due tofluctuations in production (or another cause), to allow the same currentIMA to flow thereto, it is necessary to change the gate voltage VG−2 ofthe memory transistor by ΔVG and the common signal voltage VM-2 by ΔVM.

[0148] Such voltage changes affect the drain voltage of the mirrortransistor (CM2) of the current mirror circuit of the second amplifyingportion 30. Unless the mirror transistor (CM2) operates in thesaturation region, the current IMA does not flow unlike in the normalcase.

[0149] Thus, when the sizes of the memory transistors, the memory gatetransistors, the read transistors, and the mirror transistors areproperly selected, they have proper margins of operation points. Inaddition, when the mirror transistor is designed so that it alwaysoperates in the saturation state, even if voltage fluctuations ΔVG andΔVM due to fluctuations of the threshold voltages take place, the signalcurrent IMA that is stored does not change.

[0150]FIG. 8 shows a modification example of the structure of thephotographing device shown in FIG. 1 and the structure of the pixelshown in FIG. 2.

[0151] As are clear from the timing charts shown in FIGS. 5 and 6, in npixels arranged in the vertical direction, although the reset andtransferring operation may be performed at the same time, the storingoperation and the calculating operation can be performed at differenttimes. Thus, it is not always necessary to dispose the second amplifyingportion 30 (which generates a signal current to be stored), the loadportion and calculating portion 50 (which processes a signal generatedby the storing portion 40), the outputting portion 60, and the biasportion 56 in each pixel. In other words, they can be shared by aplurality of pixels.

[0152] When these structural elements are disposed in each pixel, as thenumber of pixels increases, they may result in a bottleneck in producingthe device. Thus, it is preferred to dispose these structural elementsoutside each pixel.

[0153] In the structure of the pixel shown in FIG. 8, in each of pixels1-1 to pixel 1-n arranged in the vertical direction, only a lightreceiving portion and a first amplifying portion 20 are disposed. Onesecond amplifying portion 30 is disposed for outputs of the pixel 1-1 topixel 1-n. In other words, the second amplifying portion 30 is shared bya plurality of pixels on the same column.

[0154] In addition, a pixel-outside storing portion 2-1 to apixel-outside storing portion 2-n are disposed corresponding to thepixel 1-1 to the pixel 1-n, respectively. Each of the storing port ions2-1, . . . contains a first storing portion 40-1 to a k-th storingportion 40-k.

[0155] On the other hand, a load portion and calculating portion 50 andan outputting portion 60 are shared by the pixel-outside storing portion2-1 to the pixel-outside storing portion 2-n. Thus, even if the biasportion 55 is disposed in the photographing device, only one biasportion 55 is required for the load portion and calculating portion 50.

[0156]FIG. 9 shows another modification example of the structure of thephotographing device shown in FIG. 1 and the structure of the pixelshown in FIG. 2. In FIG. 8, n pixels arranged in the vertical directionof the photographing device and a calculation processing portion areillustrated. In contrast, in FIG. 9, such a circuit structure isrepeated in the horizontal direction as pixels arranged in a matrix.

[0157] In other words, in the example of the photographing device shownin FIG. 9, a pixel area is composed of m×n pixels arranged in thehorizontal direction and the vertical direction of a matrix. Below thepixel area, m second calculating portions 30 are disposed in thehorizontal direction. Below the second calculating portions 30, apixel-outside storing area is disposed. The pixel-outside storing areais composed of m×n pixel-outside storing portions arranged in thehorizontal direction and the vertical direction of a matrix. Below thepixel-outside storing area, an area composed of load portions andcalculating portions 50 and outputting portions 60 is disposed. Belowthe area, a horizontal outputting portion 100 is disposed.

[0158] As with the example shown in FIG. 1, a vertical driving circuit80 supplies a light receiving portion drive signal 11 and a firstamplifying portion drive signal 21 to the m pixels arranged in thehorizontal direction. A second amplifying portion drive signal 31 issupplied to the second amplifying portions 30. A storing portion drivesignal 41 is supplied to the pixel-outside storing portions 2. Acalculating portion drive signal 51 is supplied to the load portions andcalculating portions 50. An outputting portion drive signal 61 issupplied to the outputting portions 60.

[0159] Outputs of the n pixel 1-1 to pixel 1-n arranged in the verticaldirection are connected by vertical pixel signal lines 92. The signallines are inputs of the second amplifying portions 30. Outputs of thesecond amplifying portions 30 are connected to all the n pixel-outsidestoring portion 2-1 to pixel-outside storing portion 2-n arranged in thevertical direction and inputs of the load portions and calculatingportions 50.

[0160] The circuit structures and operational characteristics of thelight receiving portions 10, the first amplifying portions 20, thesecond amplifying portions 30, the storing portions 40, the loadportions and calculating portions 50, the bias portions 55, and theoutputting portions 60 disposed in the photographing device shown inFIG. 9 may be almost the same as those shown in FIGS. 3, 4, and 5.

[0161] The overall operation of the photographing device shown in FIG. 9is almost the same as that shown in FIG. 1 except that drive signals forthe second amplifying portions 30, the load and calculating portions 50,and the outputting portions 60 for n pixels arranged in the verticaldirection are independent rather than in common.

[0162]FIG. 11 is a timing chart showing operational characteristics ofthe photographing device shown in FIG. 9. The different between thetiming charts shown in FIGS. 11 and 5 is in that the write pulse (WRYfor driving the read transistor (GR2) of the second amplifying portion30, the inverter pulses (CKA) and (CKB) for driving the inverter switch(SWA) and the inverter switch (SWB) of the load portion and calculatingportion 50, respectively, and the output pulse (CK0) of the outputtingportion 60 are in common with n pixels arranged in the verticaldirection.

[0163] Last, an application example of the photographing deviceaccording to the embodiment will be described.

[0164]FIG. 12 schematically shows an active type distance measuringsystem for measuring the distance to an object (for details of thetheory of active type distance measurement, refer to for example“Measuring three-dimensional picture” by Iguchi and Sato, Sho-ko Do). Inthe example shown in FIG. 12, an object is composed of a plane and analmost semi-cylinder. The plane faces the measuring system. The almostsemi-cylinder protrudes from the front.

[0165] Slit-shaped laser light radiated from a semiconductor laser (or alight emitting diode) is reflected by a rotating mirror. The reflectedlight travels toward the object. When the radiation of the laser lightis synchronized with the rotation of the rotating mirror, the laserlight can be scanned in the left and right directions of the drawing. Acamera can photograph laser light that is radiated to the plan and thesemi-cylinder time by time. The photographing device (see FIG. 1 or FIG.9) can be applied for the camera of the distance measuring system.

[0166]FIG. 13 is a top view showing the distance measuring system shownin FIG. 12.

[0167] The camera is composed of a photographing device of which apredetermined number of light receiving elements such as fine pixels arearranged in a two-dimensional matrix shape, each of pixels being capableof detecting the intensity of received light. The camera can collect thereflected light of the object with a lens, photograph the object, andobtain the position of the received light.

[0168] One pixel P on the photographing device always observes only thedirection of view line through the lens. The direction of view line isdenoted by OP.

[0169] The rotating mirror that scans the laser light has its rotationcenter axis at the position apart from the optical axis of the lens by adistance B. Starting the rotation at time zero, the rotating mirrorscans the slit-shaped laser light to the front surface of the objectfrom the right to the left of the drawing.

[0170] Since the pixel P observes only the direction θP of view line, ifthe object is placed at a position I shown in FIG. 13, only when therotating mirror is rotated and the laser radiation angle becomes θI, thepixel P can receive the reflected light of the front surface of theobject. Likewise, if the object is placed at a position II, only whenthe rotating mirror is rotated and the laser radiation angle becomesθII, the pixel P can receive the reflected light of the front surface ofthe object.

[0171] In such a case, with a geometric calculation such as atriangulation, the distances LI and LII between the distance measuringsystem and the object can be expressed by the following formulas.$\begin{matrix}{{LI} = \frac{B \times \tan \quad \Theta \quad I \times \tan \quad \Theta \quad P}{{\tan \quad \Theta \quad I} + {\tan \quad \Theta \quad P}}} \\{{LII} = \frac{B \times \tan \quad \Theta \quad {II} \times \tan \quad \Theta \quad P}{{\tan \quad \Theta \quad {II}} + {\tan \quad \Theta \quad P}}}\end{matrix}$

[0172] In other words, with the radiation directions θI and θII of laserlight received by the pixel P, the distances LI and LII to the objectcan be uniquely obtained.

[0173] In this case, both the radiation angles θI and θII can beexpressed as functions with respect to elapsed time t after which therotating mirror starts rotating. Thus, the distances LI and LII to theobject can be expressed as functions with respect to time t.

[0174]FIG. 14 shows a temporal change of intensity of light received bythe photographing device and a calculated result of which the change ofthe intensity is calculated by the photographing device.

[0175] In the example shown in FIG. 14, at time TI, the sign of thecalculated result changes from minus to plus. Based on the change pointof the sign, the peak time of the light intensity can be detected(however, in the example shown in FIG. 14, it is assumed that thephotographing device has an output characteristic of which the amount ofcurrent decreases in proportion to the amount of received light (namely,the intensity of received light). When the peak time of the lightintensity can be detected, as was described above, the distance to theobject can be obtained.

[0176] In the example shown in FIG. 14, the calculating interval(namely, the sampling period of the photographing device) is denoted byΔT. When ΔT is shortened, the resolution of the distance measurement canbe improved.

[0177] Next, the process that has been described with reference to FIGS.12 to 14 will be explained for the case that a conventionalphotographing device is used.

[0178] The calculating interval ΔT is equivalent to the video rate forexample around 30 Hz or 60 Hz. Thus, when the object is moving, it isvery difficult to accurately measure the distance to the object.

[0179] Even if the object is stopping, to obtain the distance of theentire front surface of the object, it is necessary to scan laser ateach photographing timing of 30 Hz or 60 Hz. Thus, it will take a verylong time to measure the distance.

[0180] Moreover, the time necessary for the picture process forobtaining the laser position based on the photographed picture cannot beignored.

[0181] In contrast, when the photographing device according to theembodiment is applied, the calculating interval can be remarkablyshortened. Thus, even if an object is moving, the distance thereto canbe accurately measured.

[0182] Although the present invention has been shown and described withrespect to a best mode embodiment thereof, it should be understood bythose skilled in the art that the foregoing and various other changes,omissions, and additions in the form and detail thereof may be madetherein without departing from the spirit and scope of the presentinvention. To determine the sprit of the present invention, theaforementioned section of claims should be referenced.

[0183] As was described above, according to the present invention, anexcellent picture processing apparatus for obtaining the differencebetween picture frames can be provided so as to obtain a temporal changeof brightness of an object.

[0184] In addition, according to the preset invention, an excellentpicture processing apparatus of which a photographing device and astoring portion for storing photographed data photographed thereby aredisposed on the same circuit can be provided so as to perform acalculating process at high speed.

[0185] Moreover, according to the present invention, an excellentpicture processing apparatus that allows characteristics of a storingportion to be suppressed from fluctuating and an accurately calculatedoutput to be obtained in a situation of which a temporal change ofbrightness of an object is small can be provided.

[0186] According to the structure of the picture processing apparatus ofthe present invention, since a storing portion and a photographingdevice are disposed on the same circuit, the process can be performed athigh speed. In addition, since a bias portion adds an offset current toa current signal that is output from the storing portion and that hasnot been calculated, the influence of characteristics of the storingportion can be suppressed, thereby allowing an output of the calculatingportion to become stable.

[0187] For example, when the picture processing apparatus according tothe present invention is used as a pixel and each pixel is arranged in amatrix shape on the same circuit, a photographing device with acalculating function can be structured. With the photographing device, atemporal change of brightness of an object can be calculated at highspeed.

1. A picture processing apparatus, comprising: a light receiving portionfor generating an electric signal corresponding to intensity of receivedlight; an amplifying portion for amplifying an output signal of saidlight receiving portion; a plurality of storing portions for storing asa current signal an electric signal amplified by said amplifyingportion; a load portion for converting current outputs of said pluralityof storing portions into voltages; a bias portion for supplying anoffset current to an input of said load portion; a calculating portionfor calculating an output signal of said load portion; and an outputtingportion for outputting a calculated result of said calculating portionto the outside.
 2. The picture processing apparatus as set forth inclaim 1, wherein the plurality of storing portions store current signalscorresponding to the received light in different periods, and whereinsaid calculating portion performs a calculating process such as anaddition, a subtraction, or a comparison for the voltage signals basedon the current signals extracted from at least two of said plurality ofstoring portions.
 3. The picture processing apparatus as set forth inclaim 1, wherein said amplifying portion contains mirror transistorsthat are connected so that their gate electrodes face each other andamplify the current signals based on the theory of current mirror. 4.The picture processing apparatus as set forth in claim 1, wherein saidstoring portion stores the current signals based on the theory ofcurrent copier.
 5. The picture processing apparatus as set forth inclaim 1, wherein when said calculating portion compares the signalcurrents supplied from two of said plurality of storing portions, saidbias portion adds an offset current to a signal current supplied fromone of the two storing portions and does not add the offset current tothe signal current supplied from the other storing portion.
 6. Aphotographing device having a plurality of pixels, arranged on the samecircuit in a matrix shape, for detecting brightness of an object, eachof the pixels comprising: a light receiving portion for generating anelectric signal corresponding to intensity of received light; anamplifying portion for amplifying an output signal of said lightreceiving portion; a plurality of storing portions for storing as acurrent signal an electric signal amplified by said amplifying portion;a load portion for converting current outputs of said plurality ofstoring portions into voltages; a bias portion for supplying an offsetcurrent to an input of said load portion; a calculating portion forcalculating an output signal of said load portion; and an outputtingportion for outputting a calculated result of said calculating portion.7. The photographing device as set forth in claim 6, wherein theplurality of storing portions store current signals corresponding to thereceived light in different periods, and wherein said calculatingportion performs a calculating process such as an addition, asubtraction, or a comparison for the voltage signals based on thecurrent signals extracted from at least two of said plurality of storingportions.
 8. The photographing device as set forth in claim 6, whereinsaid amplifying portion contains mirror transistors that are connectedso that their gate electrodes face each other and amplify the currentsignals based on the theory of current mirror.
 9. The photographingdevice as set forth in claim 6, wherein said storing portion stores thecurrent signals based on the theory of current copier.
 10. Thephotographing device as set forth in claim 6, wherein when saidcalculating portion compares the signal currents supplied from two ofsaid plurality of storing portions, said bias portion adds an offsetcurrent to a signal current supplied from one of the two storingportions and does not add the offset current to the signal currentsupplied from the other storing portion.
 11. A photographing device fordetecting brightness of an object, comprising: a pixel area in whichpixels are arranged in a matrix shape, each pixel being composed of alight receiving portion for generating an electric signal correspondingto intensity of received light and an amplifying portion for amplifyingan output signal of the light receiving portion; a second amplifyingportion area in which second amplifying portions are arranged in eachcolumn of the pixels in said pixel area, each of the second amplifyingportions amplifying a current signal based on the theory of currentmirror of mirror transistors that are connected so that their gateelectrodes face each other; a pixel-outside storing area in which aplurality of storing portions are arranged in a matrix shapecorresponding to the arrangement of the pixels in said pixel area, eachof the storing portions storing as a current signal an electric signalthat has been amplified; a load portion and calculating portion area inwhich load portions and calculating portions are arranged in each columnof the pixels of said pixel area, each of the load portions convertingthe current output of the corresponding storing portion into a voltage,each of the calculating portions performing a calculating process; andan outputting portion area in which outputting portions are arranged ineach column of the pixels of said pixel area, each of the outputtingportions outputting the calculated result of the correspondingcalculating portion, wherein said pixel area, said second amplifyingportion area, said pixel-outside storing area, said load portion andcalculating portion area, and said outputting portion area are disposedon the same circuit.
 12. The photographing device as set forth in claim11, wherein the storing portions store current signals corresponding tothe received light in different periods, and wherein the calculatingportions perform a calculating process such as an addition, asubtraction, or a comparison for the voltage signals corresponding tothe current signals extracted from two or more of the storing portions.13. The photographing device as set forth in claim 11, furthercomprising: a bias portion for adding an offset current to an outputcurrent of the corresponding storing portion.
 14. The photographingdevice as set forth in claim 13, wherein when said calculating portioncompares the signal currents supplied from two of said plurality ofstoring portions, said bias portion adds an offset current to a signalcurrent supplied from one of the two storing portions and does not addthe offset current to the signal current supplied from the other storingportion.
 15. The photographing device as set forth in claim 11, whereinsaid storing portion stores the current signals based on the theory ofcurrent copier.